Functions
SERDES 10GE

Functions

CSL_IDEF_INLINE CSL_SERDES_RESULT CSL_10GeSerdesInit (uint32_t base_addr, CSL_SERDES_REF_CLOCK ref_clock, CSL_SERDES_LINK_RATE rate)
CSL_IDEF_INLINE void CSL_10GeSerdesLaneConfig (uint32_t base_addr, CSL_SERDES_REF_CLOCK ref_clock, CSL_SERDES_LINK_RATE rate, uint32_t lane_num)
CSL_IDEF_INLINE void CSL_10GeSerdesComEnable (uint32_t base_addr, CSL_SERDES_LINK_RATE rate)
CSL_IDEF_INLINE void CSL_10GeSerdesLaneEnable (uint32_t base_addr, uint32_t lane_num, CSL_SERDES_LINK_RATE rate, CSL_SERDES_LOOPBACK loopback_mode)
CSL_IDEF_INLINE void CSL_10GeSerdesLaneDisable (uint32_t base_addr, uint32_t lane_num)
CSL_IDEF_INLINE void CSL_10GeSerdesLaneReset (uint32_t base_addr, uint32_t lane_num)
CSL_IDEF_INLINE void CSL_10GeSerdesPllEnable (uint32_t base_addr, CSL_SERDES_LINK_RATE rate)
CSL_IDEF_INLINE void CSL_10GeSerdesTXBClkMode (uint32_t base_addr, CSL_SERDES_LINK_RATE rate)
CSL_IDEF_INLINE CSL_SERDES_STATUS CSL_10GeSerdesGetStatus (uint32_t base_addr, uint32_t num_lanes)
CSL_IDEF_INLINE CSL_SERDES_STATUS CSL_10GeSerdesGetLaneStatus (uint32_t base_addr, uint32_t lane_num)
CSL_IDEF_INLINE void CSL_10GeSerdesEnableXGMIIPort (uint32_t base_addr)
CSL_IDEF_INLINE void CSL_10GeSerdesShutdown (uint32_t base_addr)

Detailed Description

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Introduction

Overview

This module deals with setting up SERDES configuration for 10GE. The API flow should be as follows:

CSL_10GeSerdesInit (base_addr, ref_clock, rate);

CSL_10GeSerdesLaneConfig (base_addr, ref_clock, rate, lane_num);

CSL_10GeSerdesComEnable (base_addr, rate);

CSL_SerdesTXRXSetEqualizer(base_addr, num_lanes, phy_type, set_eq_flags);

CSL_10GeSerdesPllEnable (base_addr, link_rate);

CSL_10GeSerdesLaneEnable (base_addr, lane_num, link_rate, loopback_mode);

CSL_10GeSerdesGetStatus (base_addr, num_lanes);

CSL_Serdes_DFE_OffsetCalibration(base_addr, num_lanes, phy_type, tx_coeff);

CSL_10GeSerdesEnableXGMIIPort (base_addr);

References

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Function Documentation

CSL_IDEF_INLINE void CSL_10GeSerdesComEnable ( uint32_t  base_addr,
CSL_SERDES_LINK_RATE  rate 
)

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CSL_10GeSerdesComEnable

Description
This API enables the Serdes CMU and COMLANE

Arguments base_addr, rate

Return Value None

Pre Condition
None

Post Condition
None

Reads
None

Usage Constraints:
None

Example


     CSL_10GeSerdesComEnable(CSL_XGE_SERDES_CFG_REGS, CSL_SERDES_LINK_RATE_10p3125G);

    

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CSL_IDEF_INLINE void CSL_10GeSerdesEnableXGMIIPort ( uint32_t  base_addr)

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CSL_10GeSerdesEnableXGMIIPort

Description
This API enables the XGMII Ports

Arguments base_addr

Return Value None

Pre Condition
None

Post Condition
None

Reads
None

Usage Constraints:
XGMII rate will be set based on SERDES setup instead of manual mode. This sets the Submodule Control Register bits 0 and 1.

Example


     CSL_10GeSerdesEnableXGMIIPort(CSL_XGE_CFG_REGS);

    

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CSL_IDEF_INLINE CSL_SERDES_STATUS CSL_10GeSerdesGetLaneStatus ( uint32_t  base_addr,
uint32_t  lane_num 
)

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CSL_10GeSerdesGetLaneStatus

Description
This API returns the specific lane status for the PLL lock

Arguments base_addr, lane_num

Return Value CSL_SERDES_STATUS

Pre Condition
None

Post Condition
None

Reads
None

Usage Constraints:
None

Example


     CSL_10GeSerdesGetLaneStatus(CSL_XGE_SERDES_CFG_REGS, 0);

    

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CSL_IDEF_INLINE CSL_SERDES_STATUS CSL_10GeSerdesGetStatus ( uint32_t  base_addr,
uint32_t  num_lanes 
)

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CSL_10GeSerdesGetStatus

Description
This API returns the status of the PLL lock

Arguments base_addr, num_lanes

Return Value CSL_SERDES_STATUS

Pre Condition
None

Post Condition
None

Reads
None

Usage Constraints:
None

Example


     CSL_10GeSerdesGetStatus(CSL_XGE_SERDES_CFG_REGS, 2);

    

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CSL_IDEF_INLINE CSL_SERDES_RESULT CSL_10GeSerdesInit ( uint32_t  base_addr,
CSL_SERDES_REF_CLOCK  ref_clock,
CSL_SERDES_LINK_RATE  rate 
)

============================================================================
CSL_10GeSerdesInit

Description
This API initializes the Serdes CMU and COMLANE registers.

Arguments base_addr, ref_clock, rate

Return Value CSL_SERDES_RESULT

Pre Condition
None

Post Condition
None

Reads
None

Usage Constraints:
None

Example


    csl_retval = CSL_10GeSerdesInit(CSL_XGE_SERDES_CFG_REGS, CSL_SERDES_REF_CLOCK_156p25M, CSL_SERDES_LINK_RATE_10p3125G);

    

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CSL_IDEF_INLINE void CSL_10GeSerdesLaneConfig ( uint32_t  base_addr,
CSL_SERDES_REF_CLOCK  ref_clock,
CSL_SERDES_LINK_RATE  rate,
uint32_t  lane_num 
)

============================================================================
CSL_10GeSerdesLaneConfig

Description
This API configures the Serdes Lanes

Arguments base_addr, ref_clock, rate, lane_num

Return Value None

Pre Condition
None

Post Condition
None

Reads
None

Usage Constraints:
None

Example


     CSL_EthernetSerdesLaneConfig(CSL_XGE_SERDES_CFG_REGS, CSL_SERDES_REF_CLOCK_156p25M, CSL_SERDES_LINK_RATE_10p3125G, 1);

    

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CSL_IDEF_INLINE void CSL_10GeSerdesLaneDisable ( uint32_t  base_addr,
uint32_t  lane_num 
)

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CSL_10GeSerdesLaneDisable

Description
This API disables the Serdes Lanes

Arguments base_addr, lane_num

Return Value None

Pre Condition
None

Post Condition
None

Reads
None

Usage Constraints:
None

Example


     CSL_10GeSerdesLaneDisable(CSL_XGE_SERDES_CFG_REGS, 0);

    

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CSL_IDEF_INLINE void CSL_10GeSerdesLaneEnable ( uint32_t  base_addr,
uint32_t  lane_num,
CSL_SERDES_LINK_RATE  rate,
CSL_SERDES_LOOPBACK  loopback_mode 
)

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CSL_10GeSerdesLaneEnable

Description
This API enables the Serdes CMU and COMLANE

Arguments base_addr, lane_num, rate, loopback_mode

Return Value None

Pre Condition
None

Post Condition
None

Reads
None

Usage Constraints:
None

Example


     CSL_10GeSerdesLaneEnable(CSL_XGE_SERDES_CFG_REGS, 0, CSL_SERDES_LINK_RATE_10p3125G, CSL_SERDES_LOOPBACK_ENABLED);

    

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CSL_IDEF_INLINE void CSL_10GeSerdesLaneReset ( uint32_t  base_addr,
uint32_t  lane_num 
)

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CSL_10GeSerdesLaneReset

Description
This API resets the Serdes Lanes

Arguments base_addr, lane_num

Return Value None

Pre Condition
None

Post Condition
None

Reads
None

Usage Constraints:
None

Example


     CSL_10GeSerdesLaneReset(CSL_XGE_SERDES_CFG_REGS, 0);

    

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CSL_IDEF_INLINE void CSL_10GeSerdesPllEnable ( uint32_t  base_addr,
CSL_SERDES_LINK_RATE  rate 
)

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CSL_10GeSerdesPllEnable

Description
This API enables the PLL

Arguments base_addr, rate

Return Value None

Pre Condition
None

Post Condition
None

Reads
None

Usage Constraints:
None

Example


     CSL_10GeSerdesPllEnable(CSL_XGE_SERDES_CFG_REGS, CSL_SERDES_LINK_RATE_10p3125G);

    

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CSL_IDEF_INLINE void CSL_10GeSerdesShutdown ( uint32_t  base_addr)

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CSL_10GeSerdesShutdown

Description
This API shuts down the Serdes by Disabling and Resetting the Serdes

Arguments base_addr

Return Value None

Pre Condition
None

Post Condition
None

Reads
None

Usage Constraints:
None

Example


     CSL_10GeSerdesShutdown(CSL_XGE_SERDES_CFG_REGS);

    

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CSL_IDEF_INLINE void CSL_10GeSerdesTXBClkMode ( uint32_t  base_addr,
CSL_SERDES_LINK_RATE  rate 
)

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CSL_10GeSerdesTXBClkMode

Description
This API sets PHY-B Clock Mode to aid accurate time stamping of 1588. It is an optional function call for application requiring higher clock synchronization accuracy.

Arguments base_addr, rate

Return Value None

Pre Condition
None

Post Condition
None

Reads
None

Usage Constraints:
None

Example


     CSL_10GeSerdesTXBClkMode(CSL_XGE_SERDES_CFG_REGS, CSL_SERDES_LINK_RATE_10p3125G);

    

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