Data Fields
paEfRecLevel4_t Struct Reference

PA Egress Flow Level Four Record data structure. More...

#include <pa_fc.h>

Data Fields

uint16_t validBitMap
uint16_t ctrlBitMap
uint16_t lenOffsetPPPoE
uint16_t lenOffset802p3
uint16_t vlan1
uint16_t vlan2
uint16_t l2HdrSize
uint8_t * l2Hdr
uint8_t minPktSize
uint8_t dest
uint8_t flowId
uint8_t pktType_emacCtrl
uint32_t swInfo0
uint32_t swInfo1
uint16_t queueId
uint16_t priIfType

Detailed Description

PA Egress Flow Level Four Record data structure.

The PA Egress Flow level four record is used to instruct PASS to perform L2 Processing as specified below:

paEfRecLevel4_t defines the configuration parameters of the egress flow level one record Since not all fields are used all the time, validBitMap is used to specify which optional field is used for packet modification.

Note:
Egress flow level four record is mandatory for all egress flows.

Field Documentation

Level four record control flag Bitmap as defined at PA EgressFlow Level Four Record Control Flag Definitions

Specify egress destination (HOST, EMAC and SRIO)

Specify the 8-bit CPPI Flow ID which instructs how the link-buffer queues are used for forwarding packets

Pointer to the L2 header

L2 header size in bytes

offset to the length field within 802.3 header

offset to the PPPoE header

Minimum tx packet size: tx padding of zero is required if the length of tx packet is smaller than this value

For destination SRIO, specify the 5-bit packet type toward SRIO For destination HOST, EMAC, specify the EMAC control Ethernet MAC Output Control Bit Definitions to the network

For Host route only, specify priority-based and/or interfcae-based routing mode as defined at paRoutePriIntf_e

Specify the 16-bit egress queue ID

Placed in SwInfo0 for packets to host; Placed in the PS Info for packets to SRIO

Placed in the PS Info for packets to SRIO

Valid Bitmap corresponding to each optional field as defined at PA Egress Flow Level Four Record Valid Bit Definitions

inner VLAN (0x8100)

outer VLAN (QinQ)


The documentation for this struct was generated from the following file:

Copyright 2014, Texas Instruments Incorporated