Qmss_AccCmdCfg Struct Reference
[QMSS Low Level Driver Data Structures]

Accumulator Command interface structure. More...

#include <qmss_acc.h>


Data Fields

uint8_t channel
Qmss_AccCmdType command
uint32_t queueEnMask
uint32_t listAddress
uint16_t queMgrIndex
uint16_t maxPageEntries
uint16_t timerLoadCount
Qmss_AccPacingMode interruptPacingMode
Qmss_AccEntrySize listEntrySize
Qmss_AccCountMode listCountMode
Qmss_AccQueueMode multiQueueMode


Detailed Description

Accumulator Command interface structure.


Field Documentation

uint8_t Qmss_AccCmdCfg::channel

Accumulator channel affected (0-47)

Qmss_AccCmdType Qmss_AccCmdCfg::command

Accumulator channel command - Qmss_AccCmd_ENABLE_CHANNEL : Enable channel Qmss_AccCmd_DISABLE_CHANNEL : Disable channel

uint32_t Qmss_AccCmdCfg::queueEnMask

This field specifies which queues are to be included in the queue group. Bit 0 corresponds to the base queue index, and bit 31 corresponds to the base queue index plus 31. For any bit set in this mask, the corresponding queue index is included in the monitoring function.

This field is ignored in single-queue mode.

uint32_t Qmss_AccCmdCfg::listAddress

Physical pointer to list ping/pong buffer. NULL when channel disabled

uint16_t Qmss_AccCmdCfg::queMgrIndex

Queue Manager and Queue Number index to monitor. This serves as a base queue index when the channel in multi-queue mode, and must be a multiple of 32 when multi-queue mode is enabled.

uint16_t Qmss_AccCmdCfg::maxPageEntries

Max entries per list buffer page

uint16_t Qmss_AccCmdCfg::timerLoadCount

Number of timer ticks to delay interrupt

Qmss_AccPacingMode Qmss_AccCmdCfg::interruptPacingMode

Interrupt pacing mode. Specifies when the interrupt should be trigerred

Qmss_AccEntrySize Qmss_AccCmdCfg::listEntrySize

List entry size. Specifies the size of each data entry

Qmss_AccCountMode Qmss_AccCmdCfg::listCountMode

List count Mode. The number of entries in the list

Qmss_AccQueueMode Qmss_AccCmdCfg::multiQueueMode

Queue mode. Moitor single or multiple queues


The documentation for this struct was generated from the following file:
Copyright 2014, Texas Instruments Incorporated