Data Fields
pciePcsCfg1Reg_s Struct Reference

Specification of the PCS Configuration 1 Register. More...

#include <pcie.h>

Data Fields

uint32_t raw
 [ro] Raw image of register on read; actual value on write
uint16_t pcsErrBit
 [rw] Error bit enable.
uint8_t pcsErrLn
 [rw] Error lane enable
uint8_t pcsErrMode
 [rw] Error injection mode

Detailed Description

Specification of the PCS Configuration 1 Register.


Field Documentation

[rw] Error bit enable.

Field size: 10 bits

[rw] Error lane enable

Field size: 2 bits

[rw] Error injection mode

Field size: 2 bits


The documentation for this struct was generated from the following file:

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