![]() |
![]() |
Specification of the Correctable Error Status register. More...
#include <pcie.h>
Data Fields | |
uint32_t | raw |
uint8_t | advNFErrSt |
[rw] Advisory Non-Fatal Error Status | |
uint8_t | rplyTmrSt |
[rw] Replay Timer Timeout Status | |
uint8_t | rpltRoSt |
[rw] REPLAY_NUM Rollover Status | |
uint8_t | badDllpSt |
[rw] Bad DLLP Status | |
uint8_t | badTlpSt |
[rw] Bad TLP Status | |
uint8_t | rcvrErrSt |
[rw] Receiver Error Status |
Specification of the Correctable Error Status register.
This register may be used for both endpoint and root complex modes.
uint8_t pcieCorErrReg_s::advNFErrSt |
[rw] Advisory Non-Fatal Error Status
This bit is Set by default to enable compatibility with software that does not comprehend Role-Based Error Reporting.
Write 1 to clear
Field size: 1 bit
uint8_t pcieCorErrReg_s::badDllpSt |
[rw] Bad DLLP Status
Write 1 to clear
Field size: 1 bit
uint8_t pcieCorErrReg_s::badTlpSt |
[rw] Bad TLP Status
Write 1 to clear
Field size: 1 bit
uint32_t pcieCorErrReg_s::raw |
[ro] Raw image of register on read; actual value on write
uint8_t pcieCorErrReg_s::rcvrErrSt |
[rw] Receiver Error Status
Write 1 to clear
Field size: 1 bit
uint8_t pcieCorErrReg_s::rpltRoSt |
[rw] REPLAY_NUM Rollover Status
Write 1 to clear
Field size: 1 bit
uint8_t pcieCorErrReg_s::rplyTmrSt |
[rw] Replay Timer Timeout Status
Write 1 to clear
Field size: 1 bit