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Antenna Interface 2 HW control 3.x function. More...
#include <ti/csl/csl_aif2.h>
#include <ti/csl/csl_aif2HwControlAux.h>
Functions | |
CSL_Status | CSL_aif2HwControl (CSL_Aif2Handle hAif2, CSL_Aif2HwControlCmd cmd, void *arg) |
Antenna Interface 2 HW control 3.x function.
===========================================================================
CSL_Status CSL_aif2HwControl | ( | CSL_Aif2Handle | hAif2, |
CSL_Aif2HwControlCmd | cmd, | ||
void * | arg | ||
) |
===========================================================================
CSL_aif2HwControl
Description
This function performs various control operations on aif2 link, based on the command passed.
Arguments
haif2 Handle to the aif2 instance and link number for an argument cmd Operation to be performed on the aif2 arg Argument specific to the command
Return Value CSL_Status
Pre Condition
CSL_aif2Init(), CSL_aif2Open()
Post Condition
Registers of aif2 instance are configured according to the command and the command arguments. The command determines which registers are modified.
Writes
Registers determined by the command
Example
// handle for AIF2 CSL_Aif2Handle hAif2; // other related declarations ... // ctrl argument for hw command Bool ctrlArg; // Open handle - for use hAif2 = CSL_aif2Open(&Aif2Obj, CSL_AIF2, &aif2Param, &status); if ((hAif2 == NULL) || (status != CSL_SOK)) { printf ("\nError opening CSL_AIF2"); exit(1); } // Do config Config.globalSetup = &gblCfg; ... //Do setup CSL_aif2HwSetup(handleAif2, &Config); ctrlArg = CSL_AIF2_CTRL_RX_LINK_ENABLE; hAif2->arg_link = CSL_AIF2_LINK_0; //link 0 enable // Send hw control command to enable Tx/Rx of link 0 CSL_aif2HwControl(hAif2, CSL_AIF2_CMD_ENABLE_DISABLE_RX_LINK, (void *)&ctrlArg);
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Starts Rx link (use hAif2->arg_link to select link)
Starts Tx link (use hAif2->arg_link to select link)
Control Aif2 Emulation (argument type: CSL_Aif2VcEmu*)
Enable SD B8 PLL
Enable SD B4 PLL
Force RM Sync State (argument type: CSL_Aif2RmForceSyncState *, use hAif2->arg_link to select link)
TM L1 Inband Control Signal Set (argument type: Uint8 *, use hAif2->arg_link to select link)
Force TM Flush FIFO (argument type: Bool *, use hAif2->arg_link to select link)
Force TM Idle state (argument type: Bool *, use hAif2->arg_link to select link)
Force TM Resync state (argument type: Bool *, use hAif2->arg_link to select link)
Dynamic configuration of PD CPRI id lut register (argument type: CSL_Aif2PdCpriIdLut *, use hAif2->arg_link to select link)
Dynamic configuration of PD CPRI Control Word lut register (argument type: CSL_Aif2PdCpriCwLut *, use hAif2->arg_link to select link)
Dynamic configuration of PD DBMR (argument type: CSL_Aif2DualbitMap *, use hAif2->arg_link to select link)
Dynamic configuration of PD channel config registers (argument type: CSL_Aif2PdChannelConfig *)
Dynamic configuration of PE CPRI Control Word lut register (argument type: CSL_Aif2CpriCwLut *, use hAif2->arg_link to select link)
Dynamic configuration of PE obsai header register (argument type: CSL_Aif2PeObsaiHeader *)
Dynamic configuration of PE DBMR (argument type: CSL_Aif2PeDbmr *)
Dynamic configuration of PE Modulo rule (argument type: CSL_Aif2DualbitMap *)
Dynamic configuration of PE channel config registers (argument type: CSL_Aif2PeChannelConfig *)
Dynamic configuration of PE channel rule LUT config registers (argument type: CSL_Aif2PeChRuleLut *)
Enables Trace data and framing data capture (use hAif2->arg_link to select link, argument type: Bool *)
Data Trace Sync Enable. (argument type: Bool *)
Enables Ingress DB Debug mode (argument type: Bool *)
Debug data written to bits 128:0 of Ingress DB RAM (argument type: Uint32 *)
Ingress DB debug side band data setup (argument type: CSL_Aif2DbSideData *)
Writes the data in the following registers into the Ingress DB and sideband RAMS DB_IDB_DEBUG_D0, DB_IDB_DEBUG_D1, DB_IDB_DEBUG_D2, DB_IDB_DEBUG_D3, DB_IDB_DEBUG_SBDN (argument type: Bool *)
Set Read and Write Address used to access write or read Offset RAM for DB Debug (argument type: Uint8 * arg[0] : write offset addr arg[1] : read offset addr)
Enable or Disable Ingress DB channel to add or remove channel dynamically (argument type: Uint32 *)
Setup Ingress DB channel to add or remove channel dynamically (argument type: CSL_Aif2DbChannel *)
Enables Egress DB Debug mode (argument type: Bool *)
Setup Side band data control info like dio and fifo write enable and channel id and dio base address.(argument type: CSL_Aif2DbSideData *)
the value loaded into DB_EDB_DEBUG_RD_CNTL.CH_ID being issued to the AxC Token FIFO.(argument type: Bool *)
Reads the data in the following registers from the Egress DB and sideband RAMS DB_EDB_DEBUG_D0, DB_EDB_DEBUG_D1, DB_EDB_DEBUG_D2, DB_EDB_DEBUG_D3, DB_EDB_DEBUG_SBDN (argument type: Bool *)
Set Read and Write Address used to access write or read Offset RAM for DB Debug (argument type: Uint8 * arg[0] : write offset addr arg[1] : read offset addr)
Enable or Disable Egress DB channel to add or remove channel dynamically (argument type: Uint32 *)
Setup Egress DB channel to add or remove channel dynamically (argument type: CSL_Aif2DbChannel *)
Enable or Disable Global AD module dynamically (argument type: Bool *)
Enable or Disable Global AD module dynamically (argument type: Bool *)
Enable or Disable Global Ingress DIO mode dynamically (argument type: Bool *)
Enable or Disable Global Egress DIO mode dynamically (argument type: Bool *)
Change Ingress DIO table selection dynamically (use hAif2->arg_dioEngine to select dio engine. argument type: Uint8 *)
Change Ingress DIO num of AxC dynamically (use hAif2->arg_dioEngine to select dio engine. argument type: Uint8 *)
Change Ingress DIO BCN table dynamically (use hAif2->arg_dioEngine to select dio engine. argument type: Uint8 *)
Change Egress DIO table selection dynamically (use hAif2->arg_dioEngine to select dio engine. argument type: Uint8 *)
Change Egress DIO num of AxC dynamically (use hAif2->arg_dioEngine to select dio engine. argument type: Uint8 *)
Change Egress DIO BCN table dynamically (use hAif2->arg_dioEngine to select dio engine. argument type: Uint8 *)
Set Enable or disable Data trace DMA channel (argument type: Bool *)
Set Trace data base address (argument type: Uint32 *)
Set Trace side data base address (argument type: Uint32 *)
Sets the number of burst transfers before the destination address wraps back to the base address(argument type: Uint32 *)
Sets AT External Rad timer event dynamically (argument type: CSL_Aif2AtEvent *)
Sets AT Delta offset (use hAif2->arg_link to select link argument type: CSL_Aif2AtEvent *)
Sets AT Halt timer (argument type: Bool *)
Sets AT diable all events for debug purpose (argument type: Bool *)
Sets AT Arm timer (argument type: Bool *)
Sets AT Phy debug sync (argument type: Bool *)
Sets AT radt wcdma clock divider terminal count (argument type: Uint8 *)
Sets AT Rad terminal count (argument type: CSL_Aif2AtTcObj *)
Sets AT GSM Tcount (argument type: CSL_Aif2AtGsmTCount *)
Enable Eight Rad and Six DIO Events (argument type: CSL_Aif2AtEventIndex *)
Disable Eight Rad and Six DIO Events (argument type: CSL_Aif2AtEventIndex *)
Force set Eight Rad and Six DIO Events (argument type: CSL_Aif2AtEventIndex *)
EE End of interrupt vector value setup (argument type: Uint8 *)
EE VB error interrupt set or clear (use hAif2->ee_arg to select between set and clear argument type: CSL_Aif2EeAif2Int *)
EE DB interrupt set, clear, enable set or clear for EV0 and EV1 (use hAif2->ee_arg to select function argument type: CSL_Aif2EeDbInt *)
EE AD interrupt set, clear, enable set or clear for EV0 and EV1 (use hAif2->ee_arg to select function argument type: CSL_Aif2EeAdInt *)
EE CD(PKTDMA) interrupt set, clear, enable set or clear for EV0 (use hAif2->ee_arg to select function argument type: CSL_Aif2EeCdInt *)
EE SD interrupt set, clear, enable set or clear for EV0 and EV1 (use hAif2->ee_arg to select function argument type: CSL_Aif2EeSdInt *)
EE VC interrupt set, clear, enable set or clear for EV0 and EV1 (use hAif2->ee_arg to select function argument type: CSL_Aif2EeVcInt *)
EE Aif2 run control register setup (argument type: CSL_Aif2EeAif2Run *)
EE Link A interrupt set, clear, enable set or clear for EV0 and EV1 (use hAif2->ee_arg to select function and hAif2->arg_link to select link argument type: CSL_Aif2EeLinkAInt *)
EE Link B interrupt set, clear, enable set or clear for EV0 and EV1 (use hAif2->ee_arg to select function and hAif2->arg_link to select link argument type: CSL_Aif2EeLinkBInt *)
EE AT interrupt set, clear, enable set or clear for EV0 and EV1 (use hAif2->ee_arg to select function argument type: CSL_Aif2EeAtInt *)
EE PD common interrupt set, clear, enable set or clear for EV0 and EV1 (use hAif2->ee_arg to select function argument type: CSL_Aif2EePdInt *)
EE PE common interrupt set, clear, enable set or clear for EV0 and EV1 (use hAif2->ee_arg to select function argument type: CSL_Aif2EePeInt *)